They hit 3.2 million operations/second at 170 W compared to its existing 128-GB cards delivering 3.8 million ops/s at 225 W.The 7LPP process will deliver up to a 40% shrink and up to 20% higher speeds or 50% lower power consumption compared to its 10nm node. The prediction is based more on growth in its memory business, in which he estimates Samsung will rise to command 50% of DRAM and 45% of NAND sales. Separately, Samsung said that it now has 50 foundry partners including Ansys, Arm, Cadence (which has digital and analog flows for 7 nm), Mentor, Synopsys, and VeriSilicon, which said that it taped out a chip in the 7nm process.In its core memory business, Samsung said that it is sampling 256-GByte RDIMMs made with its 16-Gbit chips. GDDR6 graphics memories will hit 22 Gbits/s from 18 Gbits/s today, and LPDDR memories will fall from 24 mW/GB to 12 mW/GB, he added, without providing time frames.Samsung is on track to start production of 5- and 4nm nodes before June, providing evolutionary improvements with the same device sets. The 7-nm node will meet Grade 1 AEC-Q100 automotive standards by the end of the year. However, Samsung expects no customer announcements until early next year.The 7-nm node will meet Grade 1 AEC-Q100 automotive standards by the end of the year. Qualcomm is expected to split its 7nm work between TSMC and Samsung.The South Korean giant also announced that it is sampling 256-GByte RDIMMs based on its 16-Gbit DRAM chips and plans for solid-state drives with embedded Xilinx FPGAs. Therefore, the data of Samsung 7nm LPP was initially … Since then, EUV systems have hit a peak 280 W, and Samsung targets 300 W, he said.Another analyst said that Cisco, a customer of the former IBM foundry business, is now working with TSMC for 7nm products. The cards, running at DDR4 speeds up to 3,200 MHz and supporting 50-ns reads and writes, should be in production before the end of the year.EUV systems supported 250-W light sources on a sustained basis since early this year at Samsung’s S3 fab in Hwaseong, South Korea, said Bob Stear, director of foundry marketing at Samsung. The 7-nm node will meet Grade 1 AEC-Q100 automotive standards by the end of the year. The power level drove throughput up to the needed 1,500 wafers/day for production.
Pricing. In packaging, Samsung is developing an RDL interposer that will enable up to eight HBM stacks on a single device. The products, still in a prototype phase, will use a range of densities and medium-grade FPGAs.Ultimately, Samsung aims to boost DIMMs to 768 GBytes. In packaging, Samsung is developing an RDL interposer that will enable up to eight HBM stacks on a single device. It also aims to raise HBM data rates to 512 GB/s from 307 GB/s today. Samsung has the best wafer pricing the industry has ever seen. However, the node still requires some multi-patterning in base layers at the front-end-of-line, said Stear.Nevertheless, Jones forecasts that the South Korean giant’s revenues, on track to hit $90 billion this year, could leap to more than $150 billion by 2027. However, follow-on 1z and 1a nodes will increasingly use EUV, suggested Samsung’s head of DRAM development, Seong Jin Jang, in a talk here.Samsung developed its own system to compare and fix expected and actual mask patterns to speed EUV into production. They will extend EUV to perhaps six layers at 5nm nodes, but that may not come until 2021, when pellicles will have sufficient durability and light-transmission capabilities.50% lower power consumption than on 10nm, may beat TSMC to marketSamsung showed eight of the DIMMs running on an AMD Epyc server.